Supermicro


 * Платформа #1 - chassis SC815TQ-720UB link mb
 * Платформа #2 - cpu Xeon E5630 link - 1U chassis SC815TQ-R700UB link mb x8dtu-f link ipmi-port

pcb

ecc - Errors and error correction Failing bits in a memory word are detected and corrected on the fly with no impact to the application.

Спецификации модулей в скрытых комментариях.


 * KVR1333D3D4R9S/4G - в новой supermicro

4GB 1333MHz DDR3 ECC Reg CL9 DIMM DR x4 w/TS

Standard 512M X 72 ECC 1333MHz 240-pin Registered DIMM (DDR3, 1.5V, CL9, FBGA, Gold)

Fully Buffered DIMM


 * KVR667D2D4F5/4G

4GB 667MHz DDR2 ECC Fully Buffered CL5 DIMM Dual Rank, x4

Standard 512M X 72 ECC 667MHz 240-pin Fully Buffered DIMM (DDR2, 1.8V, CL5, FBGA, Gold)

<!--                                         KVR1333D3D4R9S/4G 4GB 512M x 72-Bit PC3-10600 CL9 Registered w/Parity 240-Pin DIMM DESCRIPTION: This document describes ValueRAM's 512M x 72-bit 4GB (4096MB) DDR3-1333 CL9 SDRAM (Synchronous DRAM) registered w/parity, dual-rank memory module, based on thirty-six 256M x 4-bit DDR3-1333 FBGA components. The SPD is programmed to JEDEC standard latency 1333Mhz timing of 9-9-9 at 1.5V. This 240-pin DIMM uses gold contact fingers and requires +1.5V. The electrical and mechanical specifications are as follows: FEATURES: JEDEC standard 1.5V ± 0.075V Power Supply VDDQ = 1.5V ± 0.075V 667MHz fCK for 1333Mb/sec/pin 8 independent internal bank Programmable CAS Latency: 6,7,8,9,10 Programmable Additive Latency: 0, CL - 2, or CL - 1 clock Programmable CAS Write Latency(CWL) = 7(DDR3-1333) 8-bit pre-fetch Burst Length: 8 (Interleave without any limit, sequential with starting address "000" only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS] Bi-directional Differential Data Strobe Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%) On Die Termination using ODT pin On-DIMM thermal sensor (Grade B)          Average Refresh Period 7.8us at lower then TCASE 85°C, 3.9us at 85°C < TCASE. 95°C Asynchronous Reset PCB : Height 18.75mm, double sided component PERFORMANCE: CL(IDD)                                                               9 cycles Row Cycle Time (tRCmin)                                               49.5ns (min.) Refresh to Active/Refresh Command Time (tRFCmin)                      110ns (min.) Row Active Time (tRASmin)                                             36ns (min.) Power                                                                 3.960 W (operating) UL Rating                                                             94 V - 0 Operating Temperature                                                 0o C to 85o C           Storage Temperature                                                    -55o C to +100o C

KVR667D2D4F5/4G 4GB 512M x 72-Bit PC2-5300 CL5 ECC 240-Pin FBDIMM Description: This document describes ValueRAM's 4GB (512M x 72-bit) PC2-5300 CL5 SDRAM (Synchronous DRAM) "fully buffered" ECC "dual rank" memory module. This module is based on eighteen stacked 512M x 4-bit (thirty-six 256M x 4-bit) 667MHz DDR2 FBGA components. The module also includes an AMB device (Advanced Memory Buffer). The electrical and mechanical specifications are as follows: Feature: ·     FBDIMM Module: 240-pin ·     JEDEC Standard: R/C H or E    ·      Memory Organization: 2 rank of x4 devices ·     DDR2 DRAM Interface: SSTL_18 ·     DDR2 Speed Grade: 667 Mbps ·     CAS Latency: 5-5-5 ·     Module Bandwidth: 5.3 GB/s ·     DRAM: VDD = VDDQ = 1.8V ·     AMB: VCC = VCCFBD = 1.5V ·     EEPROM: VDDSPD = 3.3V (typical) ·     Heat Spreader: Full DIMM Heat Spreader (FDHS) ·     PCB Height: 30.35mm, double-side ·     RoHS Compliant

-->